Senior Digital Design Engineer - Will Provide Sponsorship & Relocation

TekPartners Richardson, TX
senior digital digital design design engineer signal analysis digital design fpga circuits mixed signal signal integrity
December 12, 2022
TekPartners
Richardson, TX
OTHER

Title: Senior Digital Design Engineer

Location: Richardson, TX (Hybrid) *Will Provide Relocation Package*

Duration:  Direct Hire

Rate: Starting at $110K with flex

Work Requirements: Client is willing to sponsor Visa Transfers if needed

 

Role and Responsibilities: 

As a member of our hardware engineering team within the advance technology group, this role develops high speed digital signal processing circuit cards for 5G access point transceiver system consisting of 10/25/40 Gbps optical interface, front haul interface and signal processing in FPGA, DC power conversion circuitry, system clocking and synchronization circuits and high-speed data converters. You will conduct FPGA & CPLD device evaluation to determine the best application fit for cost, size and power consumption. You will make an impact by conducting digital and mixed signal circuit designs and schematic capture for all circuitries including QSFP, FPGA, CPLD, ASIC, high speed data converters, power conversion circuits and clocking circuits. Perform system architecture analysis, timing analysis, signal integrity simulation, resource estimation, power estimation, DUC/DDC frequency planning, spurious analysis, and mixed signal dynamic range analysis. You will be encouraged to lead PCB design ensuring high density FPGA break-out, high speed serial and bus matched length routing and signal integrity, line impedance control, mixed signal noise immunity, and low noise power distribution.

 

Qualifications:

  • Bachelor of Science in Electrical Engineering or a similar degree plus minimum 6 years direct related experience
  • Experience in high-speed digital design including FPGAs, CPLDs, optical SFPs, DDR4 memory, high speed data converters, power conversion circuits, system clocking and synchronization including PTP
  • Experience using Mentor Graphics or other schematic capture tools
  • Experience in directing PCB layout of high-speed signal routing, matched length routing and signal integrity simulation for 28 Gbps serial links and DDR3/4 memory interfaces
  • Experience using high-speed serial communication interfaces including LVDS, USB, SPI, CPRI (preferred) and I2C

 

Preferred Qualifications:

  • Master's degree.
  • Experience in design and routing of high-speed JESD buses and DDR interfaces.
  • Experience in generation and distribution of low jitter system clock trees.
  • Background in analyzing system architecture, timing analysis, signal integrity simulation, resource estimation, power estimation, DUC/DDC frequency planning, spurious analysis, and mixed signal dynamic range analysis.
  • Experience in development of high-speed signal processing hardware for wireless infrastructure equipment.
  • Experience implementing IEEE-1588 and SynchE client synchronizationOur benefits package includes:

 

About TekPartners:

TekPartners has been a trusted and proven technology solutions firm for over 16 years. As an information technology partner we offer our clients proven talent through professional staffing, managed services, and IT project solutions. Our company was founded on the following core values: Be the Best, Understand the Urgency, Never Ever Give Up, Have the Courage to Excel, and Make a Contribution. We will always be people helping people, and we strive to match proven talent with the right opportunities every day.

 

TekPartners is an equal opportunity employer.


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